【中英字幕】芯片制造过程详解告诉你芯片制造有多难

【中英字幕】芯片制造过程详解告诉你芯片制造有多难

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All chips start out with a very simple raw material, sand. Sand is primarily made up of silicon dioxide or silica. Silicon is the 2nd most abundant element in the Earth's crust, but is only ever found as a compound with oxygen. Complex chemical and physical processes are required to ensure that silicon crystals meet the high production standards that apply to chips.

所有的芯片都是从一种非常简单的原料开始的,沙子。沙子主要由二氧化硅或硅的氧化物组成。硅是地壳中含量第二丰富的元素,但只与氧形成化合物。需要复杂的化学和物理过程,以确保硅晶体符合适用于芯片的高生产标准。


To convert silica sand to silicon, the sand is combined with carbon and heated to an extremely high temperature to remove the oxygen. A number of other steps are required to create the finished product, namely an extremely pure mono crystalline silicon ingot called theBull, with only one impurity atom for every 10 million silicon atoms.

为了将硅砂转化为硅砂,将砂与碳结合并加热到极高的温度以除去氧。制造成品还需要许多其他步骤,即极纯的单晶硅锭,称为硅锭,每1000万个硅原子中只有一个杂质原子。


Silicon Bulls are fabricated in a range of different diameters. The most common sizes are 150,200 and 300 millimeters. Wafers with large diameters offer more space for chips. Extremely thin wafers are then cut from the silicon bulls using a special sawing technique. These wafers are the basic building blocks for subsequent chip production.

被制造成一系列不同的直径。最常见的尺寸是150,200和300毫米。直径大的晶圆为芯片提供了更多的空间。然后用一种特殊的锯切技术从硅上切下极薄的晶圆。这些晶圆是后续芯片生产的基本组成部分。


Silicon is a semiconductor. This means it can conduct electricity and also act as an insulator. Its atomic structure looks like this. Every silicon atom has four outer electrons. There are no free charge carriers. As a result, the pure monocrystalline silicon is non conductive at room temperature.

硅是一种半导体。这意味着它可以导电,也可以作为绝缘体。它的原子结构是这样的。每个硅原子都有四个外层电子但没有自由流动的载流子。因此,纯单晶硅在室温下是不导电的。


To allow it to become conductive, small quantities of specific atoms are added as impurities to the wafer. These impurity atoms must have a number of outer electrons that is either one more or one less than that of silicon, is in the 14th group of the periodic table of elements. This means that elements in the 13th or 15th group have to be used in this process referred to as doping. Boron and phosphorus atoms are the most suitable elements in these groups.

为了使其具有导电性,少量的特定原子作为杂质被添加到晶圆中。这些杂质原子必须有一定数量的外层电子,要么比硅多一个,要么比硅少一个,硅在元素周期表的第14族。这意味着在第13或第15族的元素必须在这个过程中被称为掺杂。硼和磷原子是这些基团中最合适的元素。


They are very close to silicon on the periodic table and therefore have very similar properties. Phosphorus has five outer electrons when it is inserted into the silicon crystal lattice. The 5th phosphorus electron can move freely. This means that the silicon phosphorus crystal is end conductive. In contrast, Boron atoms only have three outer electrons when they are introduced into the silicon lattice, 1 Silicon electron has nothing to bond to. This creates electron holes. The holes move through the crystal like positively charged particles, making the material p-conductive

它们在元素周期表上与硅非常接近,因此具有非常相似的性质。当磷被插入硅晶格中时,它有5个外层电子。磷的第5个电子可以自由移动。这意味着硅磷晶体是末端导电的。相比之下,当硼原子被引入硅晶格时,它们只有3个外层电子,1个硅电子没有任何可以结合的东西。这会产生电子空穴。这些洞像带正电的粒子一样穿过晶体,形成P形半导体


Transistors are built on the P and N conductive layers that exist in a doped wafer. Transistors are the smallest control units in microchips. Their job is to control electric voltages and currents, and they are by far the most important components of electronic circuits. Every transistor on a chip contains P and N conductive layers made of silicon crystals. They also have an additional layer of silicon oxide, which acts as an insulator.

晶体管是建立在存在于掺杂晶圆中的P和N导电层上的。晶体管是微芯片中最小的控制单元。它们的作用是控制电压和电流,是目前为止电子电路中最重要的元件。芯片上的每个晶体管都包含由硅晶体构成的P和N导电层。它们还有一层额外的氧化硅,作为绝缘体。


A layer of electrically conductive polysilicon is applied on top of this. Every transistor has three terminals. The middle one is attached to the gate, which is the electrically conductive polysilicon. If an electrical charge is applied to only the two outer terminals, electricity cannot flow as the transistor is blocked. This changes, however, if an additional charge is applied to the middle terminal.

一层导电多晶硅被涂在上面。每个晶体管都有三个端子。中间连接栅极,栅极为导电多晶硅。如果电荷只作用于两个外部端子,电就不能流动,因为晶体管被阻塞了。但是,如果对中间终端施加额外的费用,情况就会发生变化。


Electrons from the P layer are then pulled toward the middle terminal and accumulate at the area bordering the silicon crystal and the insulating gate oxide. A channel then forms underneath the gate between the islands of end conductive material. Electrons can now flow through this channel. The electrical circuit is closed. In this way, the transistor can be switched back and forth between current, enable and disable, between 0 and 1, on and off.

然后,来自P层的电子被拉向中间端子,并在硅晶体和绝缘栅氧化物相邻的区域积聚。然后在两端导电材料岛之间的栅极下面形成通道。电子现在可以通过这个通道。电路关闭了。通过这种方式,晶体管可以在电流、使能和使能、0和1、开和关之间来回切换。


But how are these layers created on a wafer? The process to manufacture chips from a wafer starts with the layout and design phase. Highly complex chips are made up of billions of integrated and connected transistors, enabling sophisticated circuits such as micro controllers and crypto chips to be built on a semiconductor surface. Measuring just a few square millimeters in size.

但是这些层是如何在晶圆片上形成的呢?从晶圆制造芯片的过程始于布局和设计阶段。高度复杂的芯片由数十亿个集成和连接的晶体管组成,使微控制器和加密芯片等复杂电路能够在半导体表面上构建。只有几平方毫米大小。


The sheer number of components calls for an in depth design process. This entails defining the chips functions, simulating its technical and physical properties, testing its functionality and working out the individual transistor connections.

大量的组件需要一个深入的设计过程。这需要定义芯片的功能,模拟其技术和物理特性,测试其功能,并计算出单个晶体管的连接。


Special design tools are used to draw up the plans for integrated circuits and develop a three dimensional architecture of sandwich layers. This blueprint is transferred to photo masks providing geometric images of the circuits. The photo masks are used as image templates during the subsequent chip fabrication process. To ensure that the microscopic structures of a chip are reproduced flawlessly.

使用特殊的设计工具来绘制集成电路的方案和开发多层的三维结构。该蓝图被转移到提供电路几何图像的光掩模上。在随后的芯片制造过程中,光掩模用作图像模板。确保芯片的微观结构被完美地再现。


They have to be fabricated in a dust free environment with stable temperature and humidity levels. In other words, they have to be made in a clean room. A clean room is a room in which no more than one particle of dust larger than 0.5 micrometers is permitted in around 10 liters of air. This is even cleaner than the air in an operating room.

它们必须在温度和湿度稳定的无尘环境中制造。换句话说,它们必须在洁净室中制作。洁净室是指在10升左右的空气中不允许有超过1个直径大于0.5微米的灰尘颗粒的房间。这比手术室里的空气还要干净。


The ventilation, filtration and supply systems in a clean room therefore have to be extremely sophisticated. Several million cubic meters of air are circulated every hour and hundreds of air volume regulators maintain a constant air flow. Employees in these production areas have to abide by an extremely strict dress code. They are not permitted to smoke before work or wear any makeup or jewelry. Clean room production areas can only be accessed through a special airlock.

因此,洁净室的通风、过滤和供应系统非常复杂。每小时有数百万立方米的空气循环,数百个风量调节器保持恒定的空气流量。这些生产区的员工必须遵守极其严格的着装规定。他们不允许在工作前吸烟,也不允许化妆或佩戴首饰。洁净室生产区域只能通过一个特殊的气闸进入。


Chips are built on a base wafer cut from a silicon pool. Depending on their size, several dozen or several thousand chips can be fabricated on one wafer. 1St of all, the surface of the wafer is oxidized in a high temperature furnace operating at approximately 1000 degrees Celsius to create a non conductive layer.

芯片是在从硅中切割出来的基础晶圆上制造的。根据它们的大小,一块晶圆上可以制造几十个或几千个芯片。首先,晶圆片表面在约1000摄氏度的高温炉中氧化,形成不导电层。


Then a photoresist material is uniformly distributed on this non conductive layer using centrifugal force. This coding process creates a light sensitive layer. The wafer is then exposed to light through the photomask in special exposure machines known as steppers. During this process, coaster size areas of the chip template known as recticals are used to transfer the complex geometric patterns of the circuit design to the silicon wafer. The exposed area of the chip pattern is developed, revealing the layer of oxide below.

然后利用离心力将光刻胶材料均匀分布在非导电层上。这个编码过程创造了一个光敏层。然后晶圆片通过光掩膜在称为步进器的特殊曝光机中曝光。在这个过程中,被称为矩形的芯片模板的杯垫大小区域被用来将电路设计的复杂几何图案转移到硅片上。显影所述芯片图案的暴露区域,露出下面的氧化层。


The unexposed part remains as is protecting the layer of oxide. After this, the exposed layer of oxide is etched off in the areas that have been developed using wet or plasma etching. With plasma etching, special gases bond with the substrate to be removed in the reaction chamber. This enables microscopic layers to be removed in the windows that were exposed and developed in the previous step.

未暴露的部分保留为保护氧化层。在此之后,在使用湿法或等离子体刻蚀法显影的区域蚀刻掉暴露的氧化层。在等离子蚀刻中,在反应室中,特殊气体与待去除的基板结合。这使得在前一步中曝光和显影的窗口中的微观层可以被移除。


Once the photoresist residue has been stripped and the wafer has been cleaned, the wafer undergoes further oxidation. Electrically conductive polysilicon is deposited on this insulation layer. Then photo resist is applied again and the wafer is exposed to light through the mask. The exposed photo resist is stripped again. Now the polysilicon and the thin oxide layer are etched off. These two layers only remain intact in the center under the photoresist.

一旦光刻胶残留被剥离,晶圆片被清洗干净,晶圆片就会进一步氧化。导电多晶硅沉积在该绝缘层上。然后再次应用光刻胶,晶圆片通过掩膜暴露在光线下。曝光的光刻胶被再次剥离。现在多晶硅和薄氧化层被蚀刻掉。这两层只在光刻胶下的中心保持完整。


The next step is the doping process, where impurity atoms are introduced into the exposed silicon. An ion implanter is used to shoot impurity atoms into the silicon. This changes the conductivity of the exposed silicon by fractions of a micrometer.

下一步是掺杂过程,将杂质原子引入裸露的硅中。用离子注入器将杂质原子射入硅中。这将使暴露在外的硅的导电性发生微米级的变化。


After the photoresist residue has been stripped, another oxide layer is applied. The wafer undergoes another cycle of applying photoresist exposure through the mask and stripping. Contact holes are etched to provide access to the conductive layers, enabling the contacts and interconnections to be integrated in the wafer.

在光刻胶残留物被剥离后,再涂上一层氧化层。晶圆片经过另一个通过掩模和剥离的光刻胶曝光周期。接触孔被蚀刻以提供对导电层的访问,使接触和互连能够集成到晶圆中。


This is done by depositing metal alloys onto the wafer in sputtering machines. Once again, the photo resist and mask are applied. The unexposed strips remain as is after the etching process, providing a point of contact to the underlying layers to give the insulation layer above the interconnections the smooth finish it requires. A chemical mechanical process is used to polish away excess material with micrometer accuracy.

这是通过在溅射机中将金属合金沉积到晶圆上来完成的。再一次,光刻胶和掩膜被应用。未暴露的条带在蚀刻过程后保持原样,为底层提供一个接触点,从而使互连层之上的绝缘层获得所需的光滑光洁度。用化学机械工艺以微米级的精度抛光掉多余的材料。


These individual steps may be repeated multiple times in the fabrication process until the integrated circuit is complete. Depending on the size and type of chip, the wafer will now contain anything from several dozen to thousands of chips. Individual chips are usually sought out of the wafer. The chips are not lined up flush with each other on the wafer because tiny parts of the wafer splinter off during the sawing process.

这些单独的步骤可以在制造过程中重复多次,直到集成电路完成。根据芯片的大小和类型,晶圆片现在可以包含几十到几千个芯片。单个芯片通常是从晶圆中寻找出来的。晶圆片上的晶圆片没有排列整齐,因为在锯切过程中晶圆片的微小部分会脱落。


A certain amount of space, known as the scribe line, is always left between the individual chips. Test structures are also integrated in this space between the chips and used to take measurements. Immediately after production, these text structures are destroyed during the sawing process. The size of the resulting chips typically varies between 1 square millimeter and a few square centimeters.

一定数量的空间,称为划线,总是在各个芯片之间留下。测试结构也集成在芯片之间的空间中,用于测量。在生产之后,这些文本结构在锯切过程中立即被破坏。所得到的芯片的大小通常在1平方毫米到几平方厘米之间。


The final stage of fabrication is assembly. Here the individual chips are placed in a package and terminals are attached. The result is a finished semiconductor device which can be mounted on circuit boards using different types of terminals. Over 1000 connection contacts can be realized.

Here are some examples of ready packaged semiconductor components.

制造的最后阶段是组装。在这里,单个芯片被放置在一个封装中,并连接终端。其结果是一个成品半导体器件,可以安装在电路板上使用不同类型的终端。可实现超过1000个连接触点。下面是一些现成封装半导体元件的例子。


Special larger packages are used for power semiconductors intended for applications such as trains, electric cars, solar panels and wind turbines. These power semiconductors are designed to switch electrical currents of up to several hundred amps and voltages that run into the thousands. Switching at this level generates high temperatures and this heat has to be dissipated via cooling areas integrated into the packages. Here you can see some fully packaged power semiconductors.

特殊的较大封装用于功率半导体,用于火车、电动汽车、太阳能电池板和风力涡轮机等应用。这些功率半导体被设计成可以切换高达几百安培的电流和几千安培的电压。在这个水平上切换会产生高温,这些热量必须通过集成在封装中的冷却区域消散。这里你可以看到一些完全封装的功率半导体。


Cutting edge technology is used for testing at every step in the fabrication process to ensure the highest quality levels in chip yield. Researchers and developers use scanning electron microscopes to repeatedly check the chips at different points in the production process.

在制造过程的每一步都采用尖端技术进行测试,以确保芯片产量的最高质量水平。研究人员和开发人员使用扫描电子显微镜在生产过程的不同阶段反复检查芯片。


If we compare today's microelectronics with human hair, we can see just how small these devices are. The equipment used to check components and analyze defects is just as precise. These high levels of precision and quality are essential at every stage of the work flow, from the production of silicon bulls through the cleaning room, fabrication, to quality control in order to deliver these tiny building blocks that have such a big impact on our lives today and in the future.

如果我们将今天的微电子技术与人类的头发进行比较,我们就会发现这些设备是多么的小。用于检查部件和分析缺陷的设备也同样精确。这些高水平的精度和质量在工作流程的每个阶段都是必不可少的,从硅的生产到洁净室,制造,再到质量控制,以便交付这些对我们今天和未来生活产生重大影响的微小构件。


After all, demand is rising for innovative semiconductor solutions that make life easier, safer and greener. For technology that achieves more, consumes less, and is available to everyone. Microelectronics is the key to a better future.

毕竟,对创新半导体解决方案的需求正在上升,这些解决方案使生活更轻松、更安全、更环保。技术成就更高,消耗更少,并且人人都能获得。微电子是通往更美好未来的关键。



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